The MYD-C7Z010/20 development board is built around the MYC-C7Z010/20 CPU Module which is a compact Linux-ready ZYNQ-based SOM (System on Module). The MYC-C7Z010/20 combines the Xilinx XC7Z010 (ZYNQ-7010) or XC7Z020 (ZYNQ-7020) SoC device, 1GB DDR3 SDRAM, 4GB eMMC, 32MB quad SPI Flash, a Gigabit Ethernet PHY, a USB PHY and external watchdog. It is connected to the MYD-C7Z010/20 base board through two 0.8mm pitch 140-pin board-to-board connectors.

The MYD-C7Z010/20 development board takes full features of the Zynq-7010 / 7020 SoC which is among the Xilinx Zynq-7000 family, featuring powerful dual-core ARM Cortex-A9 processing system and Xilinx 7-series Field Programmable Gate Array (FPGA) logic unit to create a rich set of peripherals to the base board through headers and connectors including one RS232 port, four USB Host ports, one Gigabit Ethernet port, CAN, HDMI, LCD/Touch screen, TF card slot, RTC, one XADC header to allow you to take advantage of Xilinx XADC; it has three PMoD headers to meet your I/O needs with PMoDs (only for 7020); it also has a low-pin count FMC connector to allow various FMC cards for custom I/O options. User can integrate a MYC-C7Z010 or a MYC-C7Z020 SOM on the same base board, thus making two variants of Zynq evaluation boards.

The MYD-C7Z010/20 development board is delivered with necessary cable accessories and MYIR offers optional 4.3-inch and 7-inchLCD Module. The board is preloaded with Linux. It is a high-performance and low-cost development platform for evaluation and prototype based on Xilinx Zynq-7000 All Programmable SoC family.

Features:

Mechanical Parameters:

Dimensions: 190mm x 110mm (base board), 75mm x 55mm (CPU Module)

PCB layers: 4-layer design (base board), 10-layer design (CPU Module)

Power supply: 12V/0.5A (base board), 5V/0.5A (CPU Module)

Working temp.: 0~70 Celsius (commercial grade) or -40~85 Celsius (industrial grade)

OS Support:

Linux 3.15.0

Xilinx XC7Z010-1CLG400C (Zynq-7010) or XC7Z020-1CLG400C or XC7Z020-2CLG400I (Zynq-7020)

- 667MHz ARM® dual-core Cortex™-A9 MPCore processor (up to 866MHz)

- Integrated Artix-7 class FPGA subsystem 

with 28K logic cells, 17,600 LUTs, 80 DSP slices (for XC7Z010)

with 85K logic cells, 53,200 LUTs, 220 DSP slices (for XC7Z020)

- NEON™ & Single / Double Precision Floating Point for each processor

- Supports a Variety of Static and Dynamic Memory Interfaces

Memory

1GB DDR3

4GB eMMC

32MB QSPI Flash (16MB is optional)

Peripherals and Signals Routed to Pins

10/100/1000M Ethernet PHY

External watchdog

Three LEDs

- One blue LED for power indicator

- One red LED for FPGA program done indicator

- One green user LED 

Two 0.8mm pitch 140-pin board-to-board expansion connectors bring out below signals:

- One Gigabit Ethernet

- One USB OTG 2.0

- Two Serial ports 

- Two I2C

- Two CAN BUS 

* Serial ports, I2C and CAN signals will be reused in PS part, or implemented through PL pins

- Two SPI (can be implemented through PL pins)

- ADC (one independent differential ADC, 16-channel ADC brought out through PL pins)

- One SDIO

PS Unit

Four USB 2.0 Host ports (through USB Hub)

One RS232 (DB9 port)

One TF card slot (bootable)

One CAN interface

One 10/100/1000M Ethernet

One 2.54mm pitch 14-pin JTAG interface (PS, PL reused)

Battery backed RTC

One User Button (One I2C, can be connected to LCD and Resistive Touch Screen)

Jumpers

- One for booting selection from TF card or QSPI

- One for JTAG selection for using PS and PL reused or independent JTAG configured through PL pins

- One for selection if adding FMC module to JTAG

PL Unit

One XADC interface

One Xilinx standard LPFMC interface

One HDMI interface (16-bit YCrCb, support 1080p display, do not support audio)

LCD/Touch screen interface (16-bit RGB, signals reused with HDMI, supports resistive and capacitive touch screen)

Two LEDs (one for FMC module detection, one for power indicator)

Three-channel PMoD (only for XC7Z020)