The MYC-C7Z010/20 CPU Module is a Linux-ready ZYNQ-based SOM (System on Module) available for either the XC7Z010 or XC7Z020 version. It integrates Xilinx’s Dual Cortex-A9 + FPGA All Programmable SoC device, 1GB DDR3 SDRAM, 4GB eMMC, 32MB quad SPI Flash, a Gigabit Ethernet PHY, a USB PHY and external watchdog. Two 0.8mm pitch 140-pin board-to-board connectors provide a large number of I/O signals for ARM peripherals and FPGA I/Os to enable your base board extension. It is ideal for your next embedded design, thus helping you reduce development effort and speed up your time to market.

The MYC-C7Z010/20 CPU Module is the core board of MYD-C7Z010/20 development board which is an excellent platform for evaluation and prototype based on MYIR’s MYC-C7Z010/20 CPU module. It takes full features of the Zynq-7010 and 7020 SoC and has extended rich peripherals to the base board including four USB Host ports, RS232 serial port, Gigabit Ethernet, CAN, LCD and HDMI. It has one XADC header to allow you take advantage of Xilinx XADC; it has three PMoD headers to meet your I/O needs with PMoDs (only for 7020); it also has a low-pin count FMC connector to allow various FMC cards for custom I/O options. Typical applications are Industrial Automation, Test & measurement, Medical Equipment, Intelligent Video Surveillance, Aerospace and military, etc.

Mechanical Parameters:

Dimensions: 75mm x 55mm (10-layer PCB design)

Power supply: 5V/0.5A

Working temp.: 0~70 Celsius (commercial grade) or -40~85 Celsius (industrial grade)

SoC:

Xilinx XC7Z010-1CLG400C (Zynq-7010) or XC7Z020-1CLG400C / XC7Z020-1CLG400I (Zynq-7020)

- 667MHz ARM® dual-core Cortex™-A9 MPCore processor (up to 866MHz)

- Integrated Artix-7 class FPGA subsystem 

with 28K logic cells, 17,600 LUTs, 80 DSP slices (for XC7Z010)

with 85K logic cells, 53,200 LUTs, 220 DSP slices (for XC7Z020)

- NEON™ & Single / Double Precision Floating Point for each processor

- Supports a Variety of Static and Dynamic Memory Interfaces

Memory:

1GB DDR3 SDRAM (512MB*2

4GB eMMC

32MB QSPI Flash (16MB is optional)

Peripherals and Signals Routed to Pins:

10/100/1000M Ethernet PHY

External watchdog

Three LEDs

- One blue LED for power indicator

- One red LED for FPGA program done indicator

- One green user LED

Two 0.8mm pitch 140-pin board-to-board expansion connectors bring out below signals:

- One Gigabit Ethernet

- One USB OTG 2.0

- Two Serial ports 

- Two I2C

- Two CAN BUS

* Serial ports, I2C and CAN signals will be reused in PS part, or implemented through PL pins

- Two SPI (can be implemented through PL pins)

- ADC (one independent differential ADC, 16-channel ADC brought out through PL pins)

- One SDIO

OS Support:

Linux 3.15.0